Patent · US Active

Delay apparatus of synchronizing circuit having improved jitter characteristic and method of controlling the same

US7541854B2 · kind B2 · utility

3Cited by
13References
15Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 29, 2006
Grant dateJun 2, 2009
Priority date
Expiry dateFeb 13, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K2005/00195
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A delay apparatus of a synchronizing circuit and a method of controlling the same are provided. In order to improve jitter characteristics, the delay apparatus includes delay units delaying input signal by variable delaying devices according to, a predetermined voltage, and a current amount control unit that changes a unit variation amount of the delay.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.