Method, apparatus and computer program product for designing logic scan chains for matching gated portions of a clock tree

US7543204B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Mark S. Fredrickson · Rochester, US
• Glen Howard Handlogten · Rochester, US
• Steven P. Jones · Elon, US
• Chad B. McBride · North Bend, US

Key dates

• Filing date: Jul 28, 2005
• Grant date: Jun 2, 2009
• Expiry date: Jul 24, 2027

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/318583
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Methods, apparatus, and computer program product are provided for designing logic scan chains for matching gated portions of a clock tree. A clock tree includes a plurality of sections, each section including a gate receiving inputs of a global clock and a chain-specific clock control signal for a particular scan chain. A plurality of scan chains is defined, each including a plurality of latches. Each scan chain latch is connected to a corresponding chain-specific clock tree section.