Schottky barrier tunnel transistor and method of manufacturing the same
US7545000B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2006 |
| Grant date | Jun 9, 2009 |
| Priority date | — |
| Expiry date | Sep 12, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/647
Abstract
Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.