Semiconductor chips having redistributed power/ground lines directly connected to power/ground lines of internal circuits and methods of fabricating the same
US7545037B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 17, 2006 |
| Grant date | Jun 9, 2009 |
| Priority date | — |
| Expiry date | Oct 12, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are embodiments of semiconductor chips having a redistributed metal interconnection directly connected to power/ground lines of an internal circuit are provided. Embodiments of the semiconductor chips include an internal circuit formed on a semiconductor substrate. A chip pad is disposed on the semiconductor substrate. The chip pad is electrically connected to the internal circuit through an internal interconnection. A passivation layer is provided over the chip pad. A redistributed metal interconnection is provided on the passivation layer. The redistributed metal interconnection directly connects the internal interconnection to the chip pad through a via-hole and a chip pad opening, which penetrate at least the passivation layer. Methods of fabricating the semiconductor chip are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.