Programmable via structure for three dimensional integration technology
US7545667B2 · kind B2 · utility
4Cited by
6References
3Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 30, 2006 |
| Grant date | Jun 9, 2009 |
| Priority date | — |
| Expiry date | Jan 21, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A programmable link structure for use in three dimensional integration (3DI) semiconductor devices includes a via filled at least in part with a phase change material (PCM) and a heating device proximate the PCM. The heating device is configured to switch the conductivity of a transformable portion of the PCM between a lower resistance crystalline state and a higher resistance amorphous state. Thereby, the via defines a programmable link between an input connection located at one end thereof and an output connection located at another end thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.