Patent · US Active

Optimization of flip flop initialization structures with respect to design size and design closure effort from RTL to netlist

US7546560B2 · kind B2 · utility

6Cited by

10References

22Claims

0Family size

Assignee

LSI · US

Inventors

Juergen Dirks · Holzkirchen, DE
Martin J. Fennell · Concord, US
Iain Stickland · Yateley, GB

Key dates

Filing date	Dec 6, 2006
Grant date	Jun 9, 2009
Priority date	—
Expiry date	Aug 6, 2027

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/3315
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method for optimizing a design of a circuit is disclosed. The method generally includes the steps of (A) identifying a plurality of first flip flops in the design and (B) replacing each of the first flip flops in a file of the design that do not have to be initialized during operations of the circuit with a respective second flip flop without an initialization capability.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.