Device for reading out a memory cell including a regulating circuit with parallel switching elements, and method
US7548474B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2006 |
| Grant date | Jun 16, 2009 |
| Priority date | — |
| Expiry date | Jun 1, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for reading out a memory cell, and a device to be used for reading out a memory cell. In one embodiment, the device includes a first circuit and a second circuit for regulating a voltage present at a line that is adapted to be connected with the memory cell to a predetermined value, wherein said first circuit includes a switching element, and wherein said first circuit is configured such that said switching element is switched on during a first regulating phase and is switched off during a second regulating phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.