Structured integrated circuit device
US7550996B2 · kind B2 · utility
0Cited by
11References
24Claims
0Family size
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Inventors
Key dates
| Filing date | Mar 3, 2006 |
| Grant date | Jun 23, 2009 |
| Priority date | — |
| Expiry date | Mar 3, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A configurable logic array may include: a multiplicity of logic cells, containing look-up tables; customizable metal and via connection layers overlying the multiplicity of logic cells; a multiplicity of device customizable I/O cells; a multiplicity of configuration customizable RAM blocks; a ROM block with customizable contents; and/or a microprocessor with customizable I/O, which may be used for configuring and testing the array, where the customizations are all done on a single via layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.