Process for producing semiconductor integrated circuit device
US7553756B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2006 |
| Grant date | Jun 30, 2009 |
| Priority date | — |
| Expiry date | Jan 1, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An object of the present invention is to prevent formation of a badly situated via metal in a Damascene wiring portion in multiple layers having an air-gap structure. In the present invention, a via is completely separated from an air-gap 45 by forming an interlayer insulating film 44 having the air-gap 45 between adjacent Damascene wiring portions after forming a sacrifice film pillar 42 from a selectively removable insulating film in a formation region of a connection hole. The present invention can provide multiple-layered buried wiring in which a high reliable via connection and a reduced parasitic capacitance due to the air-gap are achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.