Clocking architecture using a bidirectional clock port
US7555670B2 · kind B2 · utility
3Cited by
24References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 26, 2005 |
| Grant date | Jun 30, 2009 |
| Priority date | — |
| Expiry date | Mar 4, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the invention are generally directed to systems, methods, and apparatuses for a clocking architecture using a bidirectional clock. In an embodiment, a chip includes a bidirectional clock port capable of being statically configured to receive or to transmit a reference clock. In one embodiment, the chip includes a first port to receive data and a second port, wherein the chip repeats at least a portion of the data that it receives on the first port to a transmitter at the second port. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.