Field-effect transistor
US7557389B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2006 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Mar 24, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A field-effect transistor includes a channel layer formed of a III-V compound semiconductor excluding aluminum; a gate contact layer formed of a III-V compound semiconductor and provided on the channel layer, the III-V compound semiconductor having a dopant concentration equal to or less than 1×1016 cm−3, containing aluminum, and having a large band gap energy; a gate buried layer of a III-V compound semiconductor and provided on the gate contact layer; and a gate electrode buried in the gate buried layer and in contact with the gate contact layer. A recess in the gate buried layer is opposed to an upper side wall of the gate electrode with a gap therebetween and a part of the gate buried layer, and where a contact with a lower side wall of the gate electrode is established, part of the gate buried layer remains without being removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.