Conditioning logic technology
US7557618B1 · kind B1 · utility
Inventor
Key dates
| Filing date | Sep 24, 2007 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Oct 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0948
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Conditioning logic modifies the electrical characteristics of conventional logic circuits to improve speed, power, and timing margins. This is accomplished by adding circuitry to pre-condition the state of the circuit to optimize any desired transition. Basic functionality of the logic circuit in response to the inputs is unchanged, but output delays, power dissipation, and timing margins can be improved and other characteristics of the circuit can also be controlled by the conditioning circuitry such as voltage levels, leakage current and power dissipation. The effect of the conditioning circuitry on the electrical and timing parameters of the logic function is controlled by binary feedback inputs to the conditioning circuitry. Feedback inputs can be generated from any combination of logic states and clock inputs including clock inputs and logic inputs not used in the logic function receiving the feedback input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.