Thomas R. Wik
24Patents
11h-index
16Co-inventors
72Inventor score
Filing activity: Apr 18, 1994 → Sep 30, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5784328A | Memory system including an on-chip temperature sensor for regulating the refresh rate of a DRAM array | Physics | 133 | Expired |
| US5982659A | Memory cell capable of storing more than two logic states by using different via resistances | Physics | 109 | Expired |
| US5796650A | Memory circuit including write control unit wherein subthreshold leakage may be reduced | Physics | 91 | Expired |
| US5987632A | Method of testing memory operations employing self-repair circuitry and permanently disabling memory locations | Physics | 60 | Expired |
| US5559463A | Low power clock circuit | Electricity | 36 | Expired |
| US5808932A | Memory system which enables storage and retrieval of more than two states in a memory cell | Physics | 31 | Expired |
| US5761110A | Memory cell capable of storing more than two logic states by using programmable resistances | Physics | 26 | Expired |
| US5867423A | Memory circuit and method for multivalued logic storage by process variations | Physics | 19 | Expired |
| US5847990A | Ram cell capable of storing 3 logic states | Physics | 15 | Expired |
| US6370078B1 | Way to compensate the effect of coupling between bitlines in a multi-port memories | Physics | 15 | Expired |
| US6233197A | Multi-port semiconductor memory and compiler having capacitance compensation | Physics | 13 | Expired |
| US6137716A | Memory system using multiple storage mechanisms to enable storage and retrieval of more than two states in a memory cell | Physics | 10 | Expired |
| US6507524B1 | Integrated circuit memory having column redundancy | Physics | 9 | Expired |
| US9762261B2 | Error detection and correction in ternary content addressable memory (TCAM) | Electricity | 7 | Active |
| US7746921B1 | Resonant digital data transmission | Electricity | 6 | Active |
| US5841695A | Memory system using multiple storage mechanisms to enable storage and retrieval of more than two states in a memory cell | Physics | 6 | Expired |
| US5903505A | Method of testing memory refresh operations wherein subthreshold leakage current may be set to near worst-case conditions | Physics | 5 | Expired |
| US5506519A | Low energy differential logic gate circuitry having substantially invariant clock signal loading | Electricity | 5 | Expired |
| US6018480A | Method and system which permits logic signal routing over on-chip memories | Physics | 4 | Expired |
| US7557618B1 | Conditioning logic technology | Electricity | 4 | Active |
| US9780722B1 | Low-cost efficient solar panels | Emerging Cross-Sectional Technologies | 3 | Active |
| US7603509B1 | Crossbar switch with grouped inputs and outputs | Emerging Cross-Sectional Technologies | 2 | Active |
| US8921680B1 | Low-cost solar collector | Emerging Cross-Sectional Technologies | 1 | Active |
| US9529669B2 | Error detection and correction in binary content addressable memory (BCAM) | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.