Digital frequency synthesis
US7557619B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2008 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Mar 10, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/0342
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for digital frequency synthesis are described. A frequency synthesizer has an accumulator, an adder, and a predictive filter. The adder is configured to subtract a predicted error from a phase profile signal. A quantized version of the phase profile signal is separated from an error portion thereof. The predictive filter, set for a fraction of a sample frequency bandwidth, is coupled to receive the error portion for generation of a next predicted error. A storage device has digital representations of sinusoidal signals accessible responsive to the quantized version of the phase profile signal. A digital-to-analog converter is coupled to receive a digital representation of a sinusoidal signal obtained from the storage device to provide an analog sinusoidal signal. An anti-imaging filter is coupled to receive the analog sinusoidal signal and configured to filter out noise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.