Fully integrated floating power supply for high voltage technologies including N-EPI biasing
US7557644B2 · kind B2 · utility
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2References
19Claims
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Inventor
Key dates
| Filing date | Oct 4, 2006 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Sep 5, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/213
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit for feeding data acquisition circuits is provided. The integrated circuit including an inverter application having a half-bridge driver for driving high and low side switches connected in a half bridge, a data acquisition circuit formed in monolithic high voltage technology, and a Low Voltage Floating Supply (LVFS) circuit for providing voltage to the data acquisition circuit, the LVFS circuit being formed in a floating n-epi pocket biased with a voltage that is lower than a maximum value of a voltage present in the n-epi pocket.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.