Phase change memory devices and multi-bit operating methods for the same
US7558105B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 17, 2006 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Jul 31, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A phase change memory device includes a phase change resistor and first and second electrodes. The first and second electrodes may be connected to opposite ends of the phase change resistor, respectively. In a programming operation, the resistance of the phase change resistor is changed to at least one of a plurality of stages by an electric signal applied in a direction from the first electrode to the second electrode and an electric signal applied in a direction from the second electrode to the first electrode. In a reading operation, the programmed resistance of the phase change resistor is read by applying an electric signal between the first electrode and the second electrode in an arbitrary direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.