Integrated circuit and method of generating a bias current for a plurality of data transceivers
US7558552B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 19, 2004 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Jul 12, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0282
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Various embodiments of the present invention relate to circuits for and methods of generating a bias current for a plurality of data transceivers on an integrated circuit. According to one embodiment, an integrated circuit having a plurality of data transceivers comprises a first data transceiver receiving a reference voltage. A plurality of data transceivers are preferably coupled to the first data transceiver, where each the data transceiver of the plurality of data transceivers receives a reference current based upon the reference voltage from the first data transceiver. According to alternate embodiment of the invention, an external resistor is coupled to a data transceiver to generate a fixed bias current in addition to a variable bias current. A method of generating a bias current for a plurality of data transceivers is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.