Breaking a lock situation in a processor without detection of the lock situation using a multi-level approach
US7558946B2 · kind B2 · utility
1Cited by
3References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 12, 2005 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Feb 20, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/524
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the present invention includes a method including initiating a cleaning operation to clear a first processor core of a system of pending operations, and preventing injection of new events into a second processor core if the cleaning operation is not serviced in the first processor core. In this way, lock situations may be broken without their detection. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.