Circuit having a programmable circuit and method of validating a bitstream loaded into a programmable device
US7559011B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 10, 2006 |
| Grant date | Jul 7, 2009 |
| Priority date | — |
| Expiry date | Oct 8, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0061
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method of validating a bitstream loaded into a circuit having a programmable circuit is disclosed. According to one embodiment, the method comprises steps of loading a configuration bitstream comprising an error detection command at an input of the circuit; decoding the bitstream; providing a signal indicating that an error detection should be performed to a state machine when an error detection command has been decoded; and restarting the loading of the configuration bitstream if the signal has not been received. A device having a programmable circuit is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.