Virtual address translation system with caching of variable-range translation clusters
US7562205B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2007 |
| Grant date | Jul 14, 2009 |
| Priority date | — |
| Expiry date | Aug 23, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A virtual address translation table and an on-chip address cache are usable for translating virtual addresses to physical addresses. Address translation information is provided using a cluster that is associated with some range of virtual addresses and that can be used to translate any virtual address in its range to a physical address, where the sizes of the ranges mapped by different clusters may be different. Clusters are stored in an address translation table that is indexed by virtual address so that, starting from any valid virtual address, the appropriate cluster for translating that address can be retrieved from the translation table. Recently retrieved clusters are stored in an on-chip cache, and a cached cluster can be used to translate any virtual address in its range without accessing the address translation table again.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.