Time delay circuit and time to digital converter

US7564284B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Stephan Henzler · Munich, DE
• Siegmar Koppe · Laatzen, DE
• Dominik Lorenz · Birkenfeld, DE

Key dates

• Filing date: Mar 26, 2007
• Grant date: Jul 21, 2009
• Expiry date: May 7, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03K5/135
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A time delay circuit is disclosed and includes a delay line with a first delay circuit and at least a second delay circuit connected downstream. An interpolation circuit is used to generate intermediate signals derived by delayed successive signals in the delay line.