ESD protection circuit for a high frequency circuit
US7564664B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 11, 2006 |
| Grant date | Jul 21, 2009 |
| Priority date | — |
| Expiry date | Jun 10, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H9/046
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An ESD protection circuit is disclosed. In one embodiment, the ESD circuit is coupled to at least one signal transmission line and a positive and negative supply voltage of an integrated circuit, and includes at least one ESD-element connected between the signal transmission line and either one of the positive or negative supply voltages. At least one high-frequency transmission line is connected in series to the ESD-element and dimensioned in such a way that, at a predetermined high-frequency of a signal, an impedance of the current-path via the ESD-element is transformed, compared with the system impedance, from a low impedance to a very high impedance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.