One-time programmable non-volatile memory
US7564707B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 22, 2007 |
| Grant date | Jul 21, 2009 |
| Priority date | — |
| Expiry date | Jan 15, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B20/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a semiconductor substrate, elongated diffused well regions, and elongated conductors. The semiconductor substrate has a first electrical conductivity type. The elongated diffused well regions are in the semiconductor substrate. The diffused well regions have a second electrical conductivity type opposite the first electrical conductivity type. Each of the elongated electrical conductors crosses the diffused well regions at respective locations of one-time programmable memory cells. Each of the memory cells includes a antifuse structure between the respective diffused well region and the respective electrical conductor. Each of the memory cells has a first state in which the antifuse structure has a first electrical resistance and a second state in which the antifuse structure has a second electrical resistance lower than the first electrical resistance. In the second state, each of the memory cells includes a rectifying junction between the respective diffused well region and the respective electrical conductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.