Methods of forming integrated circuit devices having field effect transistors of different types in different device regions
US7566619B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 2005 |
| Grant date | Jul 28, 2009 |
| Priority date | — |
| Expiry date | Jun 19, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/027
Abstract
A method of forming an integrated circuit device includes forming a non-planar field-effect transistor in a cell array portion of a semiconductor substrate and forming a planar field-effect transistor in a peripheral circuit portion of the semiconductor substrate. The non-planar field-effect transistor may be selected from the group of a FinFET and a recessed gate FET. Dopants may be implanted into a channel region of the non-planar field-effect transistor, and a cell protection layer may be formed on the non-planar field-effect transistor. Then, dopants may be selectively implanted into a channel region of the planar field-effect transistor using the cell protection layer as a mask to block implanting of the dopants into the channel region of the non-planar field-effect transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.