Low etch pit density (EPD) semi-insulating GaAs wafers
US7566641B2 · kind B2 · utility
5Cited by
4References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 9, 2007 |
| Grant date | Jul 28, 2009 |
| Priority date | — |
| Expiry date | Sep 19, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3228
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method for manufacturing wafers using a low EPD crystal growth process and a wafer annealing process is provided that results in GaAs/InGaP wafers that provide higher device yields from the wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.