Method of managing fails in a non-volatile memory device and relative memory device
US7571362B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Nov 8, 2006 |
| Grant date | Aug 4, 2009 |
| Priority date | — |
| Expiry date | Oct 27, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/1208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of managing fails in a non-volatile memory device including an array of cells grouped in blocks of data storage cells includes defining in the array a first subset of user addressable blocks of cells, and a second subset of redundancy blocks of cells. A third subset of non-user addressable blocks of cells is defined in the array for storing the bad block address table of respective codes in an addressable page of cells of a block of the third subset. Each page of the third subset is associated to a corresponding redundancy block. If during the working life of the memory device a block of cells previously judged good in a test phase becomes failed, each block is marked as bad and the stored table in the random access memory is updated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.