Nonvolatile memory devices and methods of forming the same
US7572684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2006 |
| Grant date | Aug 11, 2009 |
| Priority date | — |
| Expiry date | Jul 12, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/903
Abstract
Nonvolatile memory devices, and methods of forming the same are disclosed. A memory device includes a substrate having a cell region, a low voltage region and a high voltage region. A ground selection transistor, a string selection transistor and a cell transistor are in the cell region, a low voltage transistor is in the low voltage region, and a high voltage transistor is in the high voltage region. A common source contact is on the ground selection transistor and a low voltage contact is on the low voltage transistor. A bit line contact is on the string selection transistor, a high voltage contact is on the high voltage transistor, and a bit line is on the bit line contact. A first insulating layer is on the substrate, and a second insulating layer is on the first insulating layer. The common source contact and the first low voltage contact extend to a height of the first insulating layer, and the bit line contact and the first high voltage contact extend to a height of the second insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.