Phase-change random access memory (PRAM) performing program loop operation and method of programming the same
US7573758B2 · kind B2 · utility
12Cited by
4References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 12, 2007 |
| Grant date | Aug 11, 2009 |
| Priority date | — |
| Expiry date | Dec 26, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A PRAM and programming method are disclosed. The PRAM includes a memory cell array including a test cell, a write driver applying a program pulse and providing a program current to the memory cell array, a sense amplification and verification circuit reading data programmed in the memory cell array and performing a program verify operation on the data, and a program loop control unit storing program verification result for the test cell at each program loop during test operation and generating the program pulse according to the program verification result to control the start of the program loop during normal operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.