Using high-level language functions in HDL synthesis tools
US7574688B1 · kind B1 · utility
7Cited by
11References
19Claims
0Family size
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Key dates
| Filing date | Jun 9, 2006 |
| Grant date | Aug 11, 2009 |
| Priority date | — |
| Expiry date | Aug 29, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of integrating a High-level Language (HLL) function with a Hardware Description Language (HDL) representation of a circuit design can include identifying an attribute of the HDL representation of the circuit design that is resolved at compile time and determining a value for the attribute using an HLL function when compiling the HDL representation of the circuit design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.