EMI shielded semiconductor package
US7576415B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2007 |
| Grant date | Aug 18, 2009 |
| Priority date | — |
| Expiry date | Feb 15, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An EMI shielded semiconductor package is provided. The package includes a substrate and a chip disposed on the substrate. The chip is electrically connected to the substrate by a plurality of bonding wires. At least one shielding conductive block is formed on the substrate and electrically connected to the ground trace of the substrate. A sealant is formed on the substrate and covers the chip, bonding wires and the shielding conductive block. The sealant has a side surface to expose a surface of the shielding conductive block. A layer of conductive film is formed on the outer surface of the sealant and covers the exposed surface of the shielding conductive block thereby shielding the chip from electromagnetic interference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.