Adjustable on-chip sub-capacitor design
US7579644B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2006 |
| Grant date | Aug 25, 2009 |
| Priority date | — |
| Expiry date | Jun 2, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One or more on-chip VNCAP or MIMCAP capacitors utilize a variable MOS capacitor to improve the uniform capacitance value of the capacitors. This permits the production of silicon semiconductor chips on which are mounted capacitors having capacitive values that are precisely adjusted to be within a range of between about 1% and 5% of their design value. This optimization can be achieved by the use of a back-to-back connection between a pair of the variable MOS capacitors for DC decoupling. It involves the parallelization of on-chip BEOL capacitance of VNCAP and/or MIMCAP capacitors by the insertion in the FEOL of pairs of back-to-back variable MOS capacitors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.