Dynamic power control for reduced voltage level of graphics controller component of memory controller based on its degree of idleness
US7581129B2 · kind B2 · utility
8Cited by
13References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 11, 2007 |
| Grant date | Aug 25, 2009 |
| Priority date | — |
| Expiry date | Feb 20, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes detecting a trigger condition, and in response to detecting the trigger condition, reducing a voltage applied to a graphics controller component of a memory controller. The reduction in voltage may cause the voltage to be reduced below a voltage level required to maintain context information in the graphics controller component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.