Semiconductor memory device comprising one or more injecting bilayer electrodes
US7582893B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2005 |
| Grant date | Sep 1, 2009 |
| Priority date | — |
| Expiry date | Jul 11, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/72
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The subject invention provides systems and methods that facilitate formation of semiconductor memory devices comprising memory cells with one or more injecting bilayer electrodes. Memory arrays generally comprise bit cells that have two discrete components; a memory element and a selection element, such as, for example, a diode. The invention increases the efficiency of a memory device by forming memory cells with selection diodes comprising a bilayer electrode. Memory cells are provided comprising bilayer cathodes and/or bilayer anodes that facilitate a significant improvement in charge injection into the diode layers of memory cells. The increased charge (e.g. electrons or holes) density in the diode layers of the selected memory cells results in improved memory cell switching times and lowers the voltage required for the memory cell to operate, thereby, creating a more efficient memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.