Method of fabricating a non-volatile memory device
US7585730B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2008 |
| Grant date | Sep 8, 2009 |
| Priority date | — |
| Expiry date | Jun 30, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
Abstract
A method of fabricating a non-volatile memory device includes forming a tunneling layer and a conductive layer on a semiconductor substrate, and patterning the conductive layer, the tunneling layer, and the semiconductor substrate to form a conductive pattern, a tunneling pattern, and a trench in the semiconductor substrate. The method also includes filling the trench with a insulating material, and exposing a partial sidewall of the conductive pattern. The method further includes recessing the exposed partial sidewall of the conductive pattern in an inward direction to form a floating gate. The floating gate includes a base portion and a protruding portion having a width smaller than that of the base portion. The method also includes etching the insulating layer to form an isolation layer that exposes the base portion of the floating gate. Still further, the method includes forming a dielectric layer, that extends along the base and protruding portions of the floating gate, and a control gate that covers the base and protruding portions of the floating gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.