Semiconductor device
US7589373B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2009 |
| Grant date | Sep 15, 2009 |
| Priority date | — |
| Expiry date | Jan 13, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
Abstract
The present invention provides a semiconductor device, which includes a substrate and a sensing memory device. The substrate includes a metal-oxide-semiconductor transistor having a gate. The sensing memory device is disposed on the gate of the metal-oxide-semiconductor transistor and includes followings. The second conductive layer is covering the first conductive layer. The charge trapping layer is disposed between the first conductive layer and the second conductive layer, wherein the first conductive layer has a sensing region therein when charges stored in the charge trapping layer, and the sensing region is adjacent to the charge trapping layer. The first dielectric layer and the second dielectric layer are respectively disposed between the charge trapping layer and the first conductive layer and between the charge trapping layer and the second conductive layer, wherein a third dielectric layer is disposed between the gate and the sensing memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.