Methods of generating a design architecture tailored to specified requirements of a PLD design
US7590965B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 19, 2006 |
| Grant date | Sep 15, 2009 |
| Priority date | — |
| Expiry date | Jan 2, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods of generating a PLD design implementation according to a design architecture tailored to specified requirements. A hardware description language (HDL) description for the PLD design includes at least one parameter value for the PLD design that will affect the preferred implementation of the design. This parameter value is passed to a high-level language (HLL) function, which is used to determine a tailored design architecture in accordance with the specified needs of the target application. The HLL function returns data specifying the tailored design architecture. This data is used in generating an implementation of the PLD design that follows the constraints imposed by the tailored design architecture. The result can be, for example, a logic gate representation of the PLD design, a netlist of the design, or a bitstream implementing the design in a target PLD.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.