Patent · US Active

Etched interposer for integrated circuit devices

US7592704B2 · kind B2 · utility

3Cited by

30References

19Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Terry Sterrett · Cave Creek, US
Devendra Natekar · Chandler, US

Key dates

Filing date	Jul 8, 2008
Grant date	Sep 22, 2009
Priority date	—
Expiry date	Jul 8, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH05K2203/1476
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

In one embodiment, a package-to-package stack is assembled comprising a first integrated circuit package, and a second integrated circuit package which are mechanically and electrically connected using an interposer. In one embodiment, the interposer 106 includes columnar interconnects which may be fabricated by etching a conductive member such as copper foil, for example. In one application, the pitch or center to center spacing of the columnar interconnects may be defined by masking techniques to provide an interconnect pitch suitable for a particular application. In yet another aspect, etching rates may be controlled to provide height to width aspect ratios of the columnar interconnects which are suitable for various applications.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.