Inventor · Chandler, AZ, US

Devendra Natekar

14Patents

6h-index

13Co-inventors

59Inventor score

Filing activity: Dec 7, 2001 → Jan 4, 2013

Most-cited inventions

Patent	Title	Area	Cited by	Status
US7402515B2	Method of forming through-silicon vias with stress buffer collars and resulting devices	Electricity	332	Expired
US7528006B2	Integrated circuit die containing particle-filled through-silicon metal vias with reduced thermal expansion	Electricity	12	Expired
US7443030B2	Thin silicon based substrate	Electricity	12	Active
US7413995B2	Etched interposer for integrated circuit devices	Electricity	11	Expired
US7514116B2	Horizontal Carbon Nanotubes by Vertical Growth and Rolling	Electricity	6	Active
US7915081B2	Flexible interconnect pattern on semiconductor package	Electricity	6	Active
US7049208B2	Method of manufacturing of thin based substrate	Electricity	6	Expired
US6803653B1	Apparatus for suppressing packaged semiconductor chip curvature while minimizing thermal impedance and maximizing speed/reliability	Electricity	4	Expired
US7589424B2	Thin silicon based substrate	Electricity	4	Active
US7144299B2	Methods and devices for supporting substrates using fluids	Emerging Cross-Sectional Technologies	3	Expired
US7592704B2	Etched interposer for integrated circuit devices	Electricity	3	Active
US8409924B2	Flexible interconnect pattern on semiconductor package	Electricity	2	Active
US8227907B2	Flexible interconnect pattern on semiconductor package	Electricity	1	Active
US8518750B2	Flexible interconnect pattern on semiconductor package	Electricity	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.