Low cost high density rectifier matrix memory
US7593246B2 · kind B2 · utility
7Cited by
13References
14Claims
0Family size
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Key dates
| Filing date | Jul 20, 2007 |
| Grant date | Sep 22, 2009 |
| Priority date | — |
| Expiry date | Oct 10, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A high density memory device is fabricated three dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and data lines, only the address signal lines need be interconnected between the layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.