Method for wafer level packaging and fabricating cap structures
US7598125B2 · kind B2 · utility
4Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2006 |
| Grant date | Oct 6, 2009 |
| Priority date | — |
| Expiry date | Oct 6, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/16235
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A cap wafer with cavities is etched through areas not covered by a patterned photoresist to form a plurality of openings. The cap wafer is bonded to a transparent wafer at the surface having the cavities and is segmented around the cavities to form a plurality of cap structures. The cap structures are hermetically sealed to a device wafer to form hermetic windows over devices and pads located on the device wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.