CMOS device with dual-epi channels and self-aligned contacts
US7598142B2 · kind B2 · utility
133Cited by
5References
7Claims
0Family size
Inventors
Key dates
| Filing date | Mar 15, 2007 |
| Grant date | Oct 6, 2009 |
| Priority date | — |
| Expiry date | Jun 12, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A CMOS device having dual-epi channels comprises a first epitaxial region formed on a substrate, a PMOS device formed on the first epitaxial region, a second epitaxial region formed on the substrate, wherein the second epitaxial region is formed from a different material than the first epitaxial region, an NMOS device formed on the second epitaxial region, and electrical contacts coupled to the PMOS and NMOS devices, wherein the electrical contacts are self-aligned.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.