Patent · US Active

Avoiding deadlocks in a multiprocessor system

US7600080B1 · kind B1 · utility

19Cited by
4References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 22, 2006
Grant dateOct 6, 2009
Priority date
Expiry dateJun 30, 2027

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F12/0817
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

In one embodiment, the present invention includes a method for receiving a first memory request from a first caching agent associated with a first processor, in a home agent associated with a memory, directing the first memory request to a writeback queue of the home agent if the first memory request is a writeback request and otherwise directing the first memory request to a second queue of the home agent. In this way, circular dependencies may be avoided. Other embodiments are described and claimed.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.