Integrated circuits; methods for operating an integrating circuit; memory modules
US7602637B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Sep 17, 2007 |
| Grant date | Oct 13, 2009 |
| Priority date | — |
| Expiry date | Apr 24, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the invention relate generally to integrated circuits, to methods for operating an integrating circuit, and to memory modules. In an embodiment of the invention, an integrated circuit having a magnetic random access memory cell is provided. The magnetic random access memory cell may include a reference layer structure being polarized in a first direction, a free layer structure including at least two anti-parallel coupled ferromagnetic layers and having an anisotropy in an axis parallel to the first direction, at least one of the at least two anti-parallel coupled ferromagnetic layers being made of a material having a temperature dependent saturation magnetization moment, and a non-magnetic tunnel barrier layer structure being disposed between the reference layer structure and the free layer structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.