Methods of manufacturing a three-dimensional semiconductor device and semiconductor devices fabricated thereby
US7605022B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 9, 2007 |
| Grant date | Oct 20, 2009 |
| Priority date | — |
| Expiry date | Sep 12, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a three-dimensional semiconductor device is provided along with a three-dimensional semiconductor device fabricated thereby. The method includes forming a heat conductive plug to channel heat away from devices on a substrate, while high temperature processes are performed on a stacked semiconductor layer. The ability to use high temperature processes on the stacked semiconductor layer without adversely effecting devices on the substrate allows the formation of a high quality single-crystalline stacked semiconductor layer. The high quality single-crystalline semiconductor layer can then be used to fabricate improved thin film transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.