Method and system for using one or more address bits and an instruction to increase an instruction set
US7606997B1 · kind B1 · utility
0Cited by
37References
14Claims
0Family size
Inventors
Key dates
| Filing date | Jul 18, 2003 |
| Grant date | Oct 20, 2009 |
| Priority date | — |
| Expiry date | Feb 28, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/30181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for expanding an instruction set by decoding an instruction located at a particular address using one or more of those address bits in conjunction with the instruction word.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.