Method of manufacturing a thin film transistor
US7611932B2 · kind B2 · utility
10Cited by
10References
16Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 9, 2005 |
| Grant date | Nov 3, 2009 |
| Priority date | — |
| Expiry date | Jul 5, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a thin film transistor is provided. The method includes forming an amorphous silicon layer on a substrate, forming a source region, a drain region, and a region of a plurality of channels electrically interposed between the source region and the drain region by patterning the amorphous silicon layer, annealing a region of the channels, sequentially forming a gate oxide film and a gate electrode on a channel surface, and doping the source region and the drain region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.