Method of fabricating metal-oxide-semiconductor transistor
US7611949B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2006 |
| Grant date | Nov 3, 2009 |
| Priority date | — |
| Expiry date | Apr 22, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/027
Abstract
A method of fabricating a metal-oxide-semiconductor (MOS) transistor is provided. First, a patterned hard mask layer with an opening therein is formed over the substrate. A spacer is formed on the sidewall of the patterned hard mask layer in the opening. An isotropic etching process is performed on the substrate to form a recess in the substrate. An ion implant process is performed on the substrate in the lower portion of the recess using oxidation-restrained ions. The spacer is removed. Then, a thermal process is performed to form a gate oxide layer on the surface of the substrate within the recess such that the gate oxide layer in the upper portion of the recess is thicker than that in the lower portion of the recess.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.