Sense-amplifier assist (SAA) with power-reduction technique
US7613050B2 · kind B2 · utility
13Cited by
7References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2007 |
| Grant date | Nov 3, 2009 |
| Priority date | — |
| Expiry date | Oct 12, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/41
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A design structure comprising an apparatus which reduces the power in memory devices in general and, in particular, static random access memory (SRAM) arrays featuring sense amplifier assist (SAA) circuitry. The design structure limits the implementation of the SAA circuitry to SRAM array blocks that do not meet the application voltage requirements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.