Soft error robust static random access memory cells
US7613067B2 · kind B2 · utility
Inventors
Key dates
| Filing date | Oct 22, 2007 |
| Grant date | Nov 3, 2009 |
| Priority date | — |
| Expiry date | Feb 26, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4125
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Static Random Access Memory (SRAM) cell is provided with an improved robustness to radiation induced soft errors. The SRAM cell includes the following elements. First and second storage nodes are configured to store complementary voltages. Access transistors are configured to selectively couple the first and second storage nodes to a corresponding bit line. Drive transistors are configured to selectively couple one of the first and second storage nodes to ground. Load transistors are configured to selectively couple the other one of the first and second storage nodes to a power supply. At least one stabilizer transistor is configured to provide a corresponding redundant storage node and limit feedback between the first and second storage nodes. The redundant storage node is capable of restoring the first or second storage nodes in case of a soft error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.