Deferring refreshes during calibrations in memory systems
US7613873B2 · kind B2 · utility
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8Claims
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Key dates
| Filing date | Feb 14, 2008 |
| Grant date | Nov 3, 2009 |
| Priority date | — |
| Expiry date | Feb 14, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system employs calibrations to ensure the precise transmission of data. During calibrations, memory refreshes can occur; however, these refreshes can interfere with calibration streams. Therefore, to alleviate collisions and interferences, refreshes are deferred to periods where no calibrations are taking place. The number of deferred refreshes is also tracked such that the overall loss of refreshes is prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.